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The problem is an invalid asm that is only triggered in 64-bit mode. It is fine in Lion branch, though adding an asm("":::"memory") in front of sync_lock_test_and_set doesn't hurt and future-proofs...
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Replying to bonzini@…: Please attach a preprocessed testcase (a *.i file obtained from gcc with the --save-temps option) and the output of adding -### to the gcc invocation. Output of GCC invoked with...
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Please attach a preprocessed testcase (a *.i file obtained from gcc with the --save-temps option) and the output of adding -### to the gcc invocation.
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Replying to mark@…: Replying to dsteffen@…: +#define dispatch_atomic_barrier() \ + asm volatile("" : : : "memory") This assembly instruction won't work on ARM or PPC, according to a similar function...
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Replying to dsteffen@…: +#define dispatch_atomic_barrier() \ + asm volatile("" : : : "memory") This assembly instruction won't work on ARM or PPC, according to a similar function in the Haskell source...
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status changed from new to accepted owner set to dsteffen@… GCC has apparently changed the __sync intrinsics to no longer be compiler barriers (nonsensical IMO since they are defined to generate...
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Disassebly of dispatch_async_f after fix: 0000000000006d50 <dispatch_async_f>: 6d50: 55 push %rbp 6d51: 48 89 e5 mov %rsp,%rbp 6d54: 48 89 5d d8 mov %rbx,0xffffffffffffffd8(%rbp) 6d58: 4c 89 65...
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